FPGA Engineer

and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL synthesis, writing...

Lugar: Chicago, IL | 12/01/2025 01:01:18 AM | Salario: S/. No Especificado | Empresa: Optiver

FPGA Engineer

, and verifying FPGAs and/or ASICs. Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++. Experience with RTL...

Lugar: Austin, TX | 11/01/2025 22:01:01 PM | Salario: S/. No Especificado | Empresa: Optiver

Hardware Engineer II

performance projections. Work with IP Micro-architects and RTL team to incorporate low power design methodologies and power...

Lugar: Mountain View, CA | 11/01/2025 02:01:14 AM | Salario: S/. $98300 per year | Empresa: Microsoft

High-Level Synthesis Technologist

Algorithm/DSP implementations in HLS or RTL targeting verticals such as wireless, optical communication, image/video processing... Engineering, or Digital Hardware Design with High-Level Synthesis or traditional RTL synthesis Direct hands-on ASIC or FPGA...

Lugar: Wilsonville, OR | 10/01/2025 23:01:55 PM | Salario: S/. No Especificado | Empresa: Siemens