CPU Cache Architect

experience in architecting processors, caches, and interconnect. Familiarity with Digital RTL Design, Software Development..., Verilog HDL. Experience writing and debugging RTL. Experience collaborating effectively towards the success of a project...

Lugar: Fort Collins, CO | 22/10/2026 20:10:50 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

CPU Cache Architect

experience in architecting processors, caches, and interconnect. Familiarity with Digital RTL Design, Software Development..., Verilog HDL. Experience writing and debugging RTL. Experience collaborating effectively towards the success of a project...

Lugar: Fort Collins, CO | 22/10/2026 18:10:35 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Staff Design Verification Engineer

up and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve... discrepancies Conduct in-depth RTL and Gate-Level simulations, analyzing timing, power, and functional correctness...

Lugar: Chandler, AZ | 22/10/2026 17:10:56 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics

Senior Principal Design Verification Engineer

and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve discrepancies..., and mixed-signal interfaces Conduct in-depth RTL and Gate-Level simulations, analyzing timing, power, and functional...

Lugar: Chandler, AZ | 22/10/2026 17:10:21 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics

Staff Design Verification Engineer

up and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve... discrepancies Conduct in-depth RTL and Gate-Level simulations, analyzing timing, power, and functional correctness...

Lugar: Plano, TX | 22/10/2026 17:10:11 PM | Salario: S/. No Especificado | Empresa: Renesas Electronics