Sr. ASIC Design Verification Engineer (Silicon Engineering)
coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring...
Staff SoC DFT Engineer, HBM
‑chip levels while partnering closely with register‑transfer level (RTL) design and SoC integration teams. Execute and sign..., including scan insertion, MBIST/LBIST concepts, boundary scan (JTAG), and ATPG. Experience working across full RTL‑to‑GDS SoC...
Lugar: Richardson, TX | 22/05/2026 17:05:54 PM | Salario: S/. No Especificado | Empresa: Micron
Principal DFT Engineer (Silicon Engineering)
insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools for RTL and gate... testing and validation support Responsible for evaluating design readiness for scan insertion through RTL and physical design...
Sr. ASIC Design Verification Engineer (Silicon Engineering)
coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring...
Design Verification Engineer (Silicon Engineering)
with scripting languages, e.g. Python for automation RTL design, chip bring-up, and post-silicon validation experience Ability...
AI/ML ASIC Architect
with other architects in the team, work with RTL/DV/Simulation/Emulation/FW teams to evaluate these changes and assess the performance...
Lugar: Milpitas, CA | 22/05/2026 17:05:43 PM | Salario: S/. No Especificado | Empresa: SanDisk
Principal Design Verification Engineer (Silicon Engineering)
, e.g. Python for automation RTL design, chip bring-up, and post-silicon validation experience Ability to work...
Principal DFT Engineer (Silicon Engineering)
insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools for RTL and gate... testing and validation support Responsible for evaluating design readiness for scan insertion through RTL and physical design...
Sr. ASIC Design Verification Engineer (Silicon Engineering)
coverage models, and analyzing results Experience with scripting languages, e.g. Python for automation RTL design, chip bring...
AI/ML ASIC Architect
with other architects in the team, work with RTL/DV/Simulation/Emulation/FW teams to evaluate these changes and assess the performance...
Lugar: Milpitas, CA | 22/05/2026 17:05:36 PM | Salario: S/. No Especificado | Empresa: SanDisk