Job Title: RTL design Engineer Job Duration: 6+ months Minimum years of experience required: 8+ years... Type of Hire: w2 contract JOB DETAILS: RTL Power Optimization - At least 8+ years of experience, Must Have Skills RTL Power...
. Job Title: ASIC/RTL Design Engineer 5 Location: San Jose, CA 95124 Duration: 12 Months Job Type: Temporary Assignment Work... environment used for high-speed SerDes and SoC IP. You will work closely with analog circuit designers, RTL designers...
ASIC / VLSI team. Responsibilities may include RTL/Physical Design, Pre-Silicon verification;Post-Silicon verification...
-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler...
-agency/non-QM, RTL/fix-and-flip, securitization and investor reporting. - Working understanding of capital markets concepts...
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USA | 01/11/2026 18:11:48 PM | Salario: S/. No Especificado | Empresa:
Nexiva Inc across projects. This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL), and Altera... expertise in RTL design using SystemVerilog and/or VHDL Demonstrated experience with Altera FPGA devices and development tools...
Pay Range: $75.00hr - $80.00hr Job Overview: The candidate will analyze and understand existing ASIC/SoC RTL... implementations, design structures, and digital logic. The role involves performing detailed RTL analysis to identify module...
on advanced nodes (7nm, 5nm, 3nm or below) Collaborate with: RTL & Micro architecture teams DFT & Test engineers Foundry...
interactions in large-scale system environments. Knowledge of Verilog and familiarity with RTL design concepts and debug workflows...
Role Overview We are seeking an experienced Senior RTL Design Engineer to support an ASIC/SoC RTL reverse engineering... project in San Diego, California. The ideal candidate will have strong expertise in RTL design, digital logic, and SoC...