ASIC Engineering Technical Leader- DFT

Technical Lead in San Jose, with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical... in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the...

Lugar: San Jose, CA | 12/03/2026 18:03:40 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

PD Intern

. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL... with transformer models and machine learning Familiarity with numerical representations and functions (RTL) Familiarity...

Lugar: San Jose, CA | 12/03/2026 18:03:30 PM | Salario: S/. No Especificado | Empresa: Etched

ASIC Engineering Technical Leader- DFT

in San Jose with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams... role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design...

Lugar: San Jose, CA | 12/03/2026 18:03:40 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

VP Whole Loan / Warehouse Financing Middle Offoce Operations

strong operational control, precision, and cross-functional coordination. Product exposure: RTL, NQM, MSR, NPL/RPL, Scratch & Dent, SFR... documentation Experience with RTL, NQM, NPL/RPL, Scratch & Dent Systems: Centricity, Alteryx preferred Experience working...

Lugar: New York City, NY | 12/03/2026 18:03:48 PM | Salario: S/. $175000 per year | Empresa: Phaxis