ASIC Design Verification Engineer

digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog) Complex computational architectures and algorithms... experience with ASIC and/or SoC design A strong background in RTL based digital IC design using Verilog/SystemVerilog Proven...

Lugar: Minneapolis, MN | 16/01/2026 22:01:18 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

High Speed Serdes System Design Engineer

with RTL simulations Develop, test, and debug firmware associated with physical layer functionality Lab testing and debug... in equalization techniques for wireline communication applications such as read-channel is also a very big plus. RTL coding...

Lugar: USA | 16/01/2026 22:01:06 PM | Salario: S/. $108000 - 192000 per year | Empresa: Broadcom

R&D Engineer IC Design 4

implementation flow from RTL synthesis, timing analysis / closure. · Requires proficiency with the following design tools / flows...: · TCL/Perl scripting · Synthesis experience with either Synopsys Design Compiler/ DC topo or Cadence RTL compiler...

Lugar: USA | 16/01/2026 21:01:21 PM | Salario: S/. No Especificado | Empresa: Broadcom

DFT Engineer

. Proven experience in RTL lint checking, scan compression, scan insertion, and the ATPG process. Experience in MBIST...

Lugar: USA | 16/01/2026 20:01:33 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom