Senior SoC/RTL Design Engineer

architecture, design, Verilog RTL coding, implementation, and verification of next generation wireless and wired ASICs for the...

Lugar: San Diego, CA | 25/06/2026 20:06:23 PM | Salario: S/. $123056 - 173400 per year | Empresa: Qualcomm

FPGA DSP Engineer

across projects. This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL), and Xilinx... Strong expertise in RTL design using SystemVerilog and/or VHDL Demonstrated experience with Xilinx FPGA devices and development tools...

Lugar: Fort Collins, CO | 25/06/2026 19:06:09 PM | Salario: S/. $143000 - 191000 per year | Empresa: Anduril Industries

Principal AI Forward Deployment Engineer

-positive reality. Why This Role Exists Customers are racing to apply LLMs and agentic AI to RTL, verification... AI / LLM-powered solutions into the customer's silicon design flows - from RTL design and verification through synthesis, place...

Lugar: USA | 25/06/2026 19:06:00 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Principal Engineer, Verification

failing tests. - Collaborate with SoC architects, microarchitects, RTL developers, postsilicon, and physical design teams...

Lugar: USA | 25/06/2026 19:06:07 PM | Salario: S/. No Especificado | Empresa: Intel

ASIC Methodology Engineer

& route tools and a good understanding of the ASIC RTL-GDSII design flow Where you will be working - this role requires the...

Lugar: Santa Clara, CA | 25/06/2026 19:06:41 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Sr Principal Application Engineer

and Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff, RTL to GDSII. Lead technical... campaigns and strategies in the RTL to GDSII digital implementation space. Aggressively push Power, Performance, and Area (PPA...

Lugar: San Jose, CA | 25/06/2026 19:06:06 PM | Salario: S/. $123200 - 228800 per year | Empresa: Cadence Design Systems

SoC Debug Engineer

platform level RTL inspection and understanding of basic RTL Gen AI knowledge and experience for automating the Debug...

Lugar: San Diego, CA | 25/06/2026 18:06:29 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Verification Engineer Senior

failing tests. Collaborate Across Teams: Work closely with SoC architects, micro architects, full chip architects, RTL...

Lugar: Austin, TX | 25/06/2026 17:06:54 PM | Salario: S/. No Especificado | Empresa: Intel