), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL.... Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios;partner with RTL, architecture, and STA...
Lugar:
Folsom, CA | 30/05/2026 21:05:21 PM | Salario: S/. No Especificado | Empresa:
Micron architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...
design/RTL and firmware Proficiency writing, modifying, and debugging embedded firmware independently Working knowledge...
related field, or equivalent practical experience At least 2 years of hands-on experience designing RTL digital logic using...
Lugar:
Irvine, CA | 30/05/2026 20:05:04 PM | Salario: S/. $110600 - 140000 per year | Empresa:
OmniVision Foster a culture of innovation, technical rigor, and continuous improvement. Collaborate with architecture, u-arch, RTL... to debug performance outliers through Performance Monitoring Counters (PMC). Drive correlation between RTL and performance...
that prevent silicon escapes and reduce re-spins. Collaborate with physical design construction teams and front-end RTL teams...
tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Contribute to engineering... date U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance ASIC/FPGA experience with RTL coding...
. Experience developing complex ASICs including defining micro-architecture, implementing RTL in Verilog/System Verilog...
Lugar:
USA | 30/05/2026 17:05:01 PM | Salario: S/. No Especificado | Empresa:
SpaceX. What You Will Do: Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration... date U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance RTL coding and simulation in VHDL...
leadership and communication — Partner routinely with Program/Project Management, Physical Design, Package / SI, RTL/Design...