CPU Physical Design Engineer

of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the... Analysis, Noise analysis, and reliability verification techniques. Strong knowledge of RTL to GDS methodologies and formal...

Lugar: Austin, TX | 29/05/2026 17:05:50 PM | Salario: S/. No Especificado | Empresa: Intel

Physical Design Engineer

, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso...

Lugar: San Diego, CA | 29/05/2026 17:05:03 PM | Salario: S/. $98500 - 147700 per year | Empresa: Qualcomm

Senior Engineer, GPU RTL Power

of people around the world. Come build with us! Role and Responsibilities As a Senior GPU RTL Power Engineer..., microarchitectural, and RTL-level power optimization strategies. You bring curiosity and knowledge in GPU/CPU microarchitecture, RTL...

Lugar: Austin, TX | 29/05/2026 17:05:33 PM | Salario: S/. $124000 - 186000 per year | Empresa: Samsung

Senior Principal Digital IC Design Engineer

communication in AI clusters. What You Can Expect Design, develop, implement, verify, and document micro-architecture and RTL... implementations. Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding...

Lugar: Santa Clara, CA | 29/05/2026 01:05:30 AM | Salario: S/. No Especificado | Empresa: Marvell

DESIGN VERIFICATION ENGINEER

) and coverage-based methodologies. Exposure to RTL design, software development, formal verification, or other related domains... in SystemVerilog and UVM along with formal to achieve verification of the design. Coordinate with RTL engineers to implement logic...

Lugar: Sunnyvale, CA | 29/05/2026 01:05:46 AM | Salario: S/. $60000 - 148500 per year | Empresa: Wipro

Senior FPGA Engineer

architectures, write RTL that becomes physical logic, and bridge hardware and software in a demanding space environment... solutions. Responsibilities Support FPGA RTL development from a blank sheet concept through flight-ready implementation...

Lugar: Hawthorne, CA | 29/05/2026 00:05:58 AM | Salario: S/. No Especificado | Empresa: Actalent

Senior Staff Engineer, ASIC/VLSI Synthesis and Design

and validate timing constraints for intricate SoC designs. Collaborate with Architecture, RTL, DFT, and Analog teams... experience in ASIC implementation and synthesis. Strong understanding of ASIC design flows, from RTL to GDSII. Knowledge...

Lugar: San Diego, CA | 29/05/2026 00:05:38 AM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell

IC Design Engineer

, provide guidance, interface with RTL team for quality RTL delivery Full chip and Block constraints development...: Working independently with the PNR & RTL design team on Physical implementation and Power-intent requirements Requirement...

Lugar: San Jose, CA | 29/05/2026 00:05:40 AM | Salario: S/. No Especificado | Empresa: Broadcom