Power Management Design Engineer

development cycle like architecture, micro architecture, RTL design along with interactions with verification, Synthesis & PD... Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains Familiar...

Lugar: San Diego, CA | 26/11/2025 18:11:33 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Digital Design Engineer

block specification, block level simulation, documentation Implementation: RTL design in Verilog, lint, clock domain... of relevant digital/ASIC/IC design experience for Bachelor's Degree Knowledge of RTL coding in Verilog and/or VHDL Knowledge...

Lugar: Agoura Hills, CA | 23/11/2025 19:11:13 PM | Salario: S/. $83400 - 154800 per year | Empresa: Rambus

Senior Emulation Methodology Engineer

for next-generation products. Work on advanced hardware/software tools that improve RTL validation, debugging, and accelerate product...). Knowledge of CPU/GPU architecture and protocols such as PCIe, DRAM, Ethernet, AMBA, and CXL. Experience in RTL design...

Lugar: Austin, TX | 22/11/2025 18:11:35 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

CPU Physical Design Timing Engineer (Austin, TX)

Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive... environment. Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus Minimum Qualifications...

Lugar: Austin, TX | 22/11/2025 03:11:05 AM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm