AMS Verification Engineer

requirements and architecture Specify, and perform as necessary, block and chip level RTL, gate, and mixed signal co-simulation...

Lugar: Wilmington, MA | 24/12/2025 22:12:30 PM | Salario: S/. $108800 - 149600 per year | Empresa: Analog Devices

Senior ASIC Design Engineer, Memory Controller

and design including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using...). Extensive experience in micro-architecture and RTL development Relevant experience with various stages in the ASIC design flow...

Lugar: Santa Clara, CA | 24/12/2025 22:12:20 PM | Salario: S/. No Especificado | Empresa: Nvidia

IP Design Verification Engineer

, and tests using System Verilog and UVM Debug RTL simulations and work with HW and FW development teams to verify fixes Review... of Formal Verification methods and apps ( FPV, CC, Sequence equivalence, etc.) Proficient in debugging firmware and RTL code...

Lugar: Santa Clara, CA | 24/12/2025 22:12:37 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior Design Engineer – AI SoC Development

constraints, and system limitations. Microarchitecture & RTL Development: Define and document microarchitecture for complex SoC... IP blocks;implement RTL in Verilog/SystemVerilog, integrate at top level, and deliver synthesis- and timing-clean...

Lugar: Folsom, CA | 24/12/2025 20:12:53 PM | Salario: S/. No Especificado | Empresa: Intel
«Anterior1234567891017