Digital Signal Processing Engineer
, understanding of scan concept and writing DFT friendly RTL. Experience in synthesis, CDC, static timing analysis. Exposure...
, understanding of scan concept and writing DFT friendly RTL. Experience in synthesis, CDC, static timing analysis. Exposure...
related verification methodologies for the corresponding design (RTL). For this position, you should have real passion.... Strong coding skills in Python or other industry-standard scripting languages. Strong understanding of RTL design (Verilog...
ideal candidate for this role. Join us to shape the future of AI hardware. What You'll Do As an RTL Design Engineer..., you'll develop logic design, register transfer level (RTL) coding, and simulation for SoC designs, integrating IP blocks...
, performance requirements and system limitations Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate... in RTL implementation PREFERRED SKILLS AND EXPERIENCE: Ability to solve complex problems including clock domain...
-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis... engineering, computer engineering, or computer science 10+ years of experience in RTL implementation and/or FPGA/ASIC development...
, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design/timing/congestion and flow...
, with teams in Ottawa, Waterloo, and San Jose focusing on FPGA design, embedded software, ASIC RTL design and verification...
on everything from embedded systems and compilers to AI/ML, infrastructure, verification, digital design/FPGA/RTL design, or system integration...
-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis... engineering, computer engineering, or computer science 10+ years of experience in RTL implementation and/or FPGA/ASIC development...
, with teams in Ottawa, Waterloo, and San Jose focusing on FPGA design, embedded software, ASIC RTL design and verification...