: you will optimize the boundary between high-performance hardware and the Linux OS, managing everything from automated RTL synthesis...
and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...
Broadcom is looking for a high-speed DSP SerDes RTL designer. Qualifications include: MS or PhD in Electrical... Engineering or Computer Engineering with 6+ years of experience in high speed ADC based SerDes RTL design. Proficient...
, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used... specifications Verilog RTL coding and synthesis Testplan reviews, assertions, debugging, code and functional coverage Floor...
and amplification, etc. Understand good coding of RTL of digital design (eg clock divider, decoder, FSM, etc) and testbench creation...
, understanding of scan concept and writing DFT friendly RTL. Experience in synthesis, CDC, static timing analysis. Exposure...
Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...
Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...
Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...
Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...