Image Signal Processing algorithms Own and deliver core level IP RTL design Run synthesis, review results to ensure..., Engineering, or related field. Ideal candidate to have 3+ years of industry exp. in: Verilog or VHDL RTL design Design...
Lugar:
San Diego, CA | 12/12/2025 01:12:06 AM | Salario: S/. $122500 - 183700 per year | Empresa:
Qualcomm characterization of various CPU benchmarks using tools like PTPX and Joules. Work closely with RTL design, Synthesis, and physical... communication skills. Preferred Qualifications Experience with low power implementation techniques in RTL, Synthesis or Physical...
Lugar:
Austin, TX | 10/12/2025 00:12:35 AM | Salario: S/. $122500 - 183700 per year | Empresa:
Qualcomm Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive... environment. Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus Minimum Qualifications...
Lugar:
Austin, TX | 22/11/2025 01:11:13 AM | Salario: S/. $122500 - 183700 per year | Empresa:
Qualcomm. Implement designs using good RTL coding and low power techniques. Collaborate with the backend team to close on synthesis... to be: Fluent in System Verilog RTL coding techniques. Familiar with modern SoC architectures and various interface technologies...
, and verification Experience modelling with System Verilog/Real Modelling/Verilog AMS and coding synthesizable RTL Experience...
closely with RTL & DFT designers Strong TCL/Python scripting knowledge required, Perl is a plus. Good debug skill...
Jobs Job Description Apply now Start Please wait... Job Title: RTL Design & Verification/ Power Engineer City: Mountain View State/Province.... For additional information, visit us at www.wipro.com. Job Description: RTL Design & Verification/ Power Engineer RTL Design...
circuits. Must be proficient in Verilog, System Verilog or VHDL RTL coding, write functional test benches and have a thorough... is a plus. Must have strong written and oral communication skills. Responsibilities: Circuit behavioral coding in Verilog, System Verilog or VHDL RTL...
Lugar:
USA | 26/11/2025 18:11:58 PM | Salario: S/. $119600 - 179500 per year | Empresa:
Northrop Grumman concepts Responsible with ASIC development process. Knowledgeable in VHDL, Verilog or SystemVerilog RTL coding and be highly...
Lugar:
USA | 21/11/2025 18:11:47 PM | Salario: S/. $119600 - 179500 per year | Empresa:
Northrop Grumman strong operational control, precision, and cross-functional coordination. Product exposure: RTL, NQM, MSR, NPL/RPL, Scratch & Dent, SFR... documentation Experience with RTL, NQM, NPL/RPL, Scratch & Dent Systems: Centricity, Alteryx preferred Experience working...