DSP Architecture Engineer

appropriate for RTL implementation. Work with digital team/firmware team to implement DSP algorithm in hardware/firmware. Hands...

Lugar: Santa Clara, CA | 26/11/2024 22:11:38 PM | Salario: S/. $128160 - 192000 per year | Empresa: Marvell

Senior DSP Engineer

and RTL-based FPGA systems. Work with various simulation tools to define and validate customized signal-processing algorithms... in limited-resource embedded systems. Assist with the translation into RTL or Firmware implementations. Define experiments...

Lugar: Pleasanton, CA | 20/11/2024 18:11:08 PM | Salario: S/. $140000 - 190000 per year | Empresa: Vector Atomic

Digital Design Engineer

expertise in RTL design, synthesis, and design optimization to drive the development of high-performance digital systems... and subsystems, focusing on RTL coding, micro-architecture, and design trade-offs. You will collaborate closely with verification...

Lugar: San Jose, CA | 18/12/2024 18:12:30 PM | Salario: S/. $119000 - 190000 per year | Empresa: Broadcom

IC Design Engineer

definition Perform RTL design using Verilog HDL, with an emphasis on performance and area Implement multi-power and low... Years of relevant industry experience. Advanced degree preferred Must have strong Logic Design, RTL coding (Verilog HDL...

Lugar: San Jose, CA | 14/12/2024 20:12:26 PM | Salario: S/. $119000 - 190000 per year | Empresa: Broadcom

Senior Staff Engineer, Digital IC Design

and develop Automotive Ethernet Switch Products. Implement new RTL design or enhancement based on the new feature specifications... and Synthesis flow. Logic Design ECO and LEC flow. Using tools of Verdi, Spyglass, 0IN and Conformal. RTL simulation...

Lugar: Santa Clara, CA | 17/01/2025 23:01:41 PM | Salario: S/. $178006 - 188006 per year | Empresa: Marvell

Staff Logic Design Engineer

to reproduce any failures found in the field Fix the RTL, recompile the FPGA and review the changes with the team Requirements... and RTL simulation Strong interpersonal, organizational and communication skills Experience at working both independently...

Lugar: Milpitas, CA | 07/12/2024 02:12:52 AM | Salario: S/. $139700 - 187770 per year | Empresa: Teledyne e2v

Physical Design Engineer

PPA (Performance, Power, Area). Experience and knowledge of hardware architecture and RTL/logic design for timing closure...

Lugar: San Jose, CA | 10/01/2025 18:01:13 PM | Salario: S/. $133300 - 186800 per year | Empresa: Cisco Systems