Senior Tax Manager
in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...
Lugar: New Castle, DE | 08/03/2026 03:03:51 AM | Salario: S/. $150000 - 200000 per year
Land Surveyor (Civil Land Development)
in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...
Lugar: Kingston, MA | 08/03/2026 03:03:55 AM | Salario: S/. $150000 - 200000 per year
Litigation Paralegal
in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...
Lugar: USA | 08/03/2026 03:03:05 AM | Salario: S/. $150000 - 200000 per year
Principal FPGA Engineer I
and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi...
Lugar: El Segundo, CA | 16/01/2026 02:01:47 AM | Salario: S/. $165000 - 199000 per year | Empresa: CesiumAstro
Hardware Design Engineer
analysis RTL coding and verification Memory Controller + PHY integration and verification Customer delivery and support... Qualifications Strong System Verilog/Verilog RTL design expertise Questa/Incisive/VCS simulator experience Python/Perl/Tcl...
Lugar: Hillsboro, OR | 12/02/2026 02:02:51 AM | Salario: S/. $106900 - 198500 per year | Empresa: Rambus
Static Timing Analysis (STA) Engineer – (Lead or Senior)
signoff and at least one ASIC tape-out. Good understanding of RTL to GDS flow Proficiency using Synopsys Primetime...
Lugar: El Segundo, CA - Los Angeles, CA | 14/01/2026 02:01:18 AM | Salario: S/. $146200 - 197800 per year | Empresa: Boeing
Senior Staff Engineer, Static Timing Analysis (STA) Engineer
teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner... verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure Provide...
Lugar: Santa Clara, CA | 12/02/2026 23:02:56 PM | Salario: S/. $131010 - 196300 per year | Empresa: Marvell
Staff Digital Design Engineer
and RTL for advanced ML/AI accelerator ASICs/SoCs including advanced memory system and high-performance NoC. Understand... teams. Manage RTL implementation to achieve functionally correct, performant designs within project schedules...
Lugar: Boston, MA | 17/02/2026 20:02:50 PM | Salario: S/. $176000 - 196000 per year | Empresa: Lightmatter
ASIC Engineer
and coverage for complex chips. You will also design RTL as per the architecture specs. Your collaboration with architects.... You will: Writing testplans Specification and test plan reviews Implementing RTL designs Building test cases, scripts, reference...
Lugar: San Jose, CA | 26/01/2026 18:01:16 PM | Salario: S/. $135800 - 193400 per year | Empresa: Cisco Systems
ASIC Design Verification Engineer
implementation and review Qualify RTL design by running Gate Level Simulations on netlists Collaborate with designers, architects... desirable Knowledge of formal verification tools (e.g., Jasper or VC Formal) Experience with RTL Design desirable Familiarity...
Lugar: San Jose, CA | 26/01/2026 18:01:42 PM | Salario: S/. $135800 - 193400 per year | Empresa: Cisco Systems