Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...
Lugar:
San Jose, CA | 10/12/2025 22:12:01 PM | Salario: S/. $120000 - 192000 per year | Empresa:
Broadcom successful candidate will be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network.... 5). Develop Verilog RTL. design verification support, logic synthesis, physical implementation constraints, static...
Lugar:
San Jose, CA | 20/11/2025 02:11:22 AM | Salario: S/. $120000 - 192000 per year | Empresa:
Broadcom experience - Work closely with RTL & DFT designers - Strong TCL/Python scripting knowledge required, Perl is a plus. - Good...
Lugar:
San Jose, CA | 19/11/2025 20:11:46 PM | Salario: S/. $120000 - 192000 per year | Empresa:
Broadcom of industry standard verification methodologies and tools Hands on and In-depth knowledge in UVM, System Verilog, RTL design...
Lugar:
San Jose, CA | 31/10/2025 02:10:20 AM | Salario: S/. $120000 - 192000 per year | Empresa:
Broadcom with RTL simulations Develop, test, and debug firmware associated with physical layer functionality Lab testing and debug... in equalization techniques for wireline communication applications such as read-channel is also a very big plus. RTL coding...
Lugar:
USA | 17/01/2026 03:01:58 AM | Salario: S/. $108000 - 192000 per year | Empresa:
Broadcom, Engineering, or related field Strong RTL and Testbench debug skills Experience in synthesizable coding style Experience... from RTL to bitstream for Xilinx and/or Altera products Hands on experience with lab bring up, debug, chipscope and instrument...
. • RTL Integration: Manage and merge RTL codebases, ensure connectivity and bus/interface protocols (e.g., AMBA, AXI, AHB...) are correctly implemented. • Top-Level Assembly: Create and maintain top-level SoC RTL, wrappers, and interconnects. • Linting...
Lugar:
Santa Clara, CA | 06/11/2025 23:11:59 PM | Salario: S/. $126800 - 190900 per year | Empresa:
Apple! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade...
Lugar:
Santa Clara, CA | 05/11/2025 20:11:49 PM | Salario: S/. $126800 - 190900 per year | Empresa:
Apple with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture...
Lugar:
Santa Clara, CA | 31/10/2025 00:10:10 AM | Salario: S/. $126800 - 190900 per year | Empresa:
Apple of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate... will possess detailed understanding of RTL design, synthesis, static timing analysis, PLDRC, clock domain crossing, and low power...
Lugar:
San Diego, CA | 24/01/2026 02:01:08 AM | Salario: S/. $127200 - 190800 per year | Empresa:
Qualcomm