ASIC Design Engineer

-architecture specifications and participate in specification and test plan reviews. Architect and implement complex RTL designs...

Lugar: San Jose, CA | 05/12/2024 18:12:53 PM | Salario: S/. $133300 - 186800 per year | Empresa: Cisco Systems

ASIC Verification Engineer

some of the most complex ASICs being developed in the industry. You will work with front-end RTL Design and Verification teams...

Lugar: San Jose, CA | 04/12/2024 18:12:51 PM | Salario: S/. $133300 - 186800 per year | Empresa: Cisco Systems

ASIC Verification Engineer

developed in the industry. You will work with front-end RTL Design and Verification teams and Architects to understand chip...

Lugar: San Jose, CA | 24/11/2024 18:11:14 PM | Salario: S/. $133300 - 186800 per year | Empresa: Cisco Systems

Digital Design Engineer, Senior Staff

manager to define block micro-architecture and write design specification. Implement a specification using RTL coding... with focus on front-end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASIC design...

Lugar: Santa Clara, CA | 16/01/2025 00:01:34 AM | Salario: S/. $124160 - 186000 per year | Empresa: Marvell

CPU Architecture Performance Engineer

, SIMD, load/store, MMU, caches, retire, etc. Verify performance feature between RTL and model...-architecture knowledge Experience working in a RTL simulation environment Experience working in a performance modeling...

Lugar: San Diego, CA | 26/11/2024 18:11:16 PM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm

Graphics FE Integration Engineer

. As a member of GPU FE Design integration team, you will create GPU RTL by integrating various IPs following architectural..., you will be responsible for: - RTL integration, partitioning, design analysis and qualification. - Run logic equivalence checking...

Lugar: Santa Clara, CA | 16/01/2025 00:01:16 AM | Salario: S/. $121900 - 183600 per year | Empresa: Apple