ASIC/FPGA Design Engineer (SMES)
requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal...
requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal...
++ Experience RTL development using SystemVerilog Familiarity with AMD FPGAs and design tools Project leadership Primary Level...
/400 Gz data rates. Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL...
be responsible for designing RTL within complex digital systems, timing closure, and power/area optimization. This position requires... in digital design engineering including RTL design, synthesis/PNR, and verification methodologies Experience in frequency domain...
etc Hands on experience with RTL Coding and methodologies, IP integration flows, design quality tools . Hands on experience...
Summary: Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of RTL and Synthesis solutions for the...: Participating to the development of Qualcomm RTL Optimization engine and methods, leveraging both design analytics and GenAI...
knowledge of data structures, algorithms and design patterns Experience in the areas of RTL Synthesis (System Verilog...
, and verification or similarly for custom circuit design/layout flow. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso...
characterizing DDR interfaces Strong debugging skills are a must Desired: Experience or coursework with RTL languages...
checks, Lint checks, RTL/gate level simulations & silicon debugging scripting for various IC design tasks such as STA... result review, CDC checks, Lint checks, RTL/gate level simulations & silicon debugging scripting for various IC design...