RTL Design Engineer (TERADYNE, North Reading, MA)

. You will join a best-in-class Digital team as a RTL Designer working in collaboration with an Analog team and product architects to develop Teradyne... your productivity. Responsibilities: Developing specifications, micro-architecture, and RTL design of mission critical blocks...

Lugar: North Reading, MA | 11/08/2026 20:08:09 PM | Salario: S/. $123100 per year | Empresa: Teradyne

Integrated Circuit Design Verification Engineer

. We are seeking an RTL Verification Engineer to support the verification and validation of complex digital integrated circuits... and systems-on-chip (SoCs) in our Columbus, Ohio location. As an RTL Verification Engineer III, you will develop and execute...

Lugar: Columbus, OH | 09/10/2026 22:10:37 PM | Salario: S/. $86400 - 123100 per year | Empresa: Battelle

Physical Design Engineer

, partnering closely with architecture, RTL design, DFT, timing, power, and verification teams to help deliver high-quality silicon... to identify issues and support closure activities. Collaborate with RTL, design, DFT, CAD, and verification teams to resolve...

Lugar: San Jose, CA | 26/09/2026 02:09:19 AM | Salario: S/. $105000 - 120000 per year | Empresa: Altera

Systems Engineer

/Verilog), implementing designs using RTL Ability to show self as team player, able to multi-task, able to generate quality...

Lugar: USA | 30/10/2026 18:10:46 PM | Salario: S/. $79300 - 118900 per year | Empresa: Northrop Grumman

Associate Digital Design Engineer

, simulate, and verify RTL designs using industry-standard methodologies and tools. Support synthesis, timing analysis.... Experience with RTL development using Verilog and/or SystemVerilog. Familiarity with digital design, simulation, verification...

Lugar: San Jose, CA | 21/08/2026 21:08:23 PM | Salario: S/. $86043 - 118309 per year | Empresa: Analog Devices

FPGA Engineer

environment. Responsibilities Design and verification of RTL modules for FPGA applications Initial test and bring-up...

Lugar: Torrance, CA | 06/09/2026 00:09:54 AM | Salario: S/. $102000 - 118000 per year | Empresa: Epirus

Embedded Firmware & FPGA Engineer

synthesizable RTL using Verilog, SystemVerilog, and/or VHDL. Develop FPGA logic for functions such as PWM generation, digital... and design practices. Develop testbenches and perform RTL simulation and functional verification to ensure designs meet...

Lugar: Youngsville, NC | 14/10/2026 17:10:43 PM | Salario: S/. $80000 - 118000 per year | Empresa: Eaton