technologies. Define specifications and documentation for IP microarchitecture and interfaces. Implement RTL in Verilog..., and control;partner with firmware engineers to ensure seamless integration. Perform RTL linting, clock domain crossing (CDC...
. Within this team, we're looking for an experienced RTL design engineer to serve as our Chip Pervasive Logic expert — owning the power... management, clocking, and reset microarchitecture and RTL for these Core Complex designs. The candidate will be a key contributor...
is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers... architects to micro-architect cutting edge high-speed SerDes PHY design RTL design of digital blocks, such as calibration...
support multiple business units and require a strong grasp of the full ASIC design flow, from RTL through GDSII... and analog design teams Develop micro-architecture and implement RTL for complex mixed-signal IP blocks Apply advanced...
products through breakthrough performance and power efficiency. We are seeking an experienced CPU-Core RTL Manager to lead... a team of highly skilled CPU RTL engineers responsible for developing industry-leading high-performance, low-power CPU cores...
General Summary: We are hiring talented engineers for CPU RTL Power targeted for high performance, low power devices.... In this role, you will be responsible for all key aspects of CPU power modeling and analysis, and RTL power estimation...
) device programs from conception & planning to productization. You will leverage modern RTL design methodologies, advanced EDA... engineers to understand the product requirements and IP features. Build early-stage RTL designs based on product...
in perpetuity, so they can turn generative AI into one of their most valuable assets. About the team The RTL design team builds... microarchitecture through tape-out, including RTL implementation, PPA trade-offs, quality gates like lint, CDC, and LEC, and timing...
We are looking for a Principal PCIe Sub-system Front-end RTL Lead to drive the development of next-generation chiplet.... Lead the integration of third-party PCIe controller and PHY hard IP, including wrapper RTL, mode selection, telemetry hooks...
-on with RTL implementation for integer, floating point and reservation station logic and can provide technical leadership... to deliver world-class products. As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited...