R&D Intern - FPGA/RTL Design Engineer

connectivity, including video and high-bandwidth data. Job Description THE OPPORTUNITY The Intern – FPGA/RTL Design Engineer... architecting for wireless communication projects. RTL coding, simulation, and test bench development. FPGA synthesis and timing...

Lugar: Irvine, CA | 01/04/2026 01:04:09 AM | Salario: S/. $28.6 - 33.8 per hour | Empresa: Motorola Solutions

CPU RTL Design Engineer

processors that power the future of computing. Key Responsibilities: Develop logic design, register transfer level (RTL.... Apply strategies, tools, and methods to write RTL code, optimizing logic for power, performance, area, and timing goals, as well...

Lugar: Chandler, AZ | 23/03/2026 20:03:07 PM | Salario: S/. No Especificado | Empresa: Intel

CPU RTL Design Engineer

's cutting-edge processors. You will drive the development of register transfer level (RTL) code and simulation for the CPU... design, register transfer level (RTL) coding, and simulation for the CPU. Participate in defining the architecture...

Lugar: Austin, TX | 23/03/2026 18:03:50 PM | Salario: S/. No Especificado | Empresa: Intel

SoC / RTL Low-Power Expert

, advanced die-to-die and packaging technology, and optimized low-power techniques. We are seeking a SoC / RTL Low-Power Expert... architecture, RTL power intent, estimation, correlation, and power sign-off, including situations where specifications or workloads...

Lugar: Santa Clara, CA | 14/03/2026 21:03:02 PM | Salario: S/. No Especificado | Empresa: Marvell

Senior CPU RTL Design Engineer

microprocessors. We are looking for a skilled individual who is hands-on with RTL implementation for integer, floating point... and reservation station logic and can provide technical leadership to deliver world-class products. As a CPU RTL Logic Design...

Lugar: Austin, TX | 06/03/2026 23:03:26 PM | Salario: S/. No Especificado | Empresa: Intel

RTL Intern

infrastructure layer for the fastest growing industry in history. Job Summary As an RTL Intern at Etched, you will help design... microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL...

Lugar: San Jose, CA | 08/02/2026 03:02:15 AM | Salario: S/. No Especificado | Empresa: Etched

Emulation Lead Engineer

and resolution of hardware, software, and model issues. Develop HW/SW enablement flows and tools to accelerate RTL validation...

Lugar: Santa Clara, CA | 03/04/2026 21:04:39 PM | Salario: S/. No Especificado | Empresa: Marvell

Staff SoC Design Engineer

This role focuses on SoC microarchitecture, RTL design, and full-chip integration for high-performance designs. The position... and specification through RTL development, integration, and design sign-off — in close collaboration with verification, physical design...

Lugar: Santa Clara, CA | 03/04/2026 18:04:23 PM | Salario: S/. $113920 - 170600 per year | Empresa: Marvell