CPU Verification engineer

environment. Finds and implements corrective measures to resolve failing tests. Collaborates with CPU architects, RTL developers...

Lugar: Phoenix, AZ | 03/04/2026 01:04:35 AM | Salario: S/. $105650 - 172860 per year | Empresa: Intel

Senior Staff CAD Engineer, Multi-die 3DIC & Power

and flow development in an ASIC rtl-to-gds environment Strong proficiency in TCL and python scripting for CAD flow... routing for silicon & fanout, SI/PI analysis Experience with power analysis topics RTL power estimation & optimization...

Lugar: Santa Clara, CA | 02/04/2026 21:04:45 PM | Salario: S/. $127630 - 191200 per year | Empresa: Marvell

Principal Digital IC Design Engineer

their mission-critical infrastructure. What You Can Expect Define and drive micro-architecture and RTL implementation..., correlating RTL simulations with lab measurements, and working with validation teams to resolve production issues Contribute...

Lugar: Boise, ID | 02/04/2026 00:04:16 AM | Salario: S/. No Especificado | Empresa: Marvell

Principal Design Verification Engineer

failures using systematic root-cause analysis techniques, correlating RTL behavior with specifications, and partnering... that enhance productivity across global verification teams Support multiple verification platforms including RTL simulation...

Lugar: Boise, ID | 02/04/2026 00:04:41 AM | Salario: S/. No Especificado | Empresa: Marvell

Senior Staff Design Verification Engineer

failures using systematic root-cause analysis techniques, correlating RTL behavior with specifications, and partnering... that enhance productivity across global verification teams Support multiple verification platforms including RTL simulation...

Lugar: Austin, TX | 01/04/2026 17:04:12 PM | Salario: S/. No Especificado | Empresa: Marvell

ASIC Digital Design, Senior Staff Engineer

: Define and develop ASIC RTL design and verification at both chip level and block level. Collaborate with cross-functional... teams to design, implement, and verify PCIe interfaces. Perform RTL coding, synthesis, and simulation to ensure design...

Lugar: Austin, TX | 29/03/2026 00:03:11 AM | Salario: S/. No Especificado | Empresa: Synopsys