Senior Pre-Silicon Verification Engineer

collaboration across architecture, RTL development, and analog design teams to deliver high-quality clock generation solutions... with architects, RTL developers, and analog schematic owners to improve verification of architectural and microarchitectural features...

Lugar: Hillsboro, OR | 24/03/2026 21:03:40 PM | Salario: S/. No Especificado | Empresa: Intel

Sr. FPGA Development Engineer, Bespoke Solutions

job responsibilities - Develop custom RTL and integrate with third party libraries to build end to end 100G+ solutions. - Collaborate... programmable logic and embedded software to interact with custom hardware. You will debug RTL in simulation, synthesize...

Lugar: Arlington, VA | 24/03/2026 19:03:56 PM | Salario: S/. No Especificado | Empresa: Amazon

CPU Formal Verification Engineer

to simplify design complexity and ensure convergence on validation. Collaborate with architects, RTL developers, and physical...

Lugar: Hillsboro, OR | 23/03/2026 00:03:31 AM | Salario: S/. No Especificado | Empresa: Intel

CPU Design Verification Engineer

architect and RTL designers to verify complex architectural and microarchitectural features. Document verification strategies...

Lugar: Austin, TX | 21/03/2026 02:03:08 AM | Salario: S/. No Especificado | Empresa: Intel

Pre-Silicon Verification Engineer

. Finds and implements corrective measures to resolve failing tests. Collaborates with CPU architects, RTL developers... with RTL development Knowledge of system level boot flows and power management. Experience in Computer-Architecture...

Lugar: Austin, TX | 20/03/2026 21:03:27 PM | Salario: S/. No Especificado | Empresa: Intel

ASIC Design Engineer

blocks. Own RTL development for assigned blocks, delivering high‑quality, synthesizable SystemVerilog RTL that meets... design, including micro‑architecture development, RTL implementation (SystemVerilog preferred), and integration of complex...

Lugar: Irvine, CA | 20/03/2026 02:03:43 AM | Salario: S/. $151000 - 223440 per year | Empresa: Marvell

FPGA Engineer

requirements and block-level micro-architectures, partition design within ASIC/FPGA, create specification documents. – Develop RTL... and/or FPGAs (internship and research experience qualifies). – 2+ years of experience in SystemVerilog, Verilog, or VHDL RTL...

Lugar: Linthicum Heights, MD | 20/03/2026 02:03:02 AM | Salario: S/. No Especificado | Empresa: Next Step Systems