Digital IC Design Engineer Intern

, your responsibilities will include: Micro-architecture design and RTL implementation of: Low-power digital signal processors Low... in SystemVerilog, C/C++, Python Experience working on complex digital systems from architecture, microarchitecture, and RTL, using...

Lugar: Fremont, CA | 28/10/2025 23:10:59 PM | Salario: S/. $35 per hour | Empresa: Neuralink