from RTL/netlist through post-silicon debug. In this role, you will partner closely with RTL, Physical Design, and ATE teams... violations at both block and top levels Run, analyze, and debug SpyGlass DFT/RTL checks, working with design teams to close...
and implements corrective measures to resolve failing tests Collaborates with GPU architects, RTL developers, and physical design...
architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural...
Lugar:
Austin, TX | 21/02/2026 19:02:24 PM | Salario: S/. $91150 - 172860 per year | Empresa:
Intel in cryptography with a strong understanding of tradeoff and countermeasures. Familiarity with hardware RTL development (Verilog/VHDL...
Engineer, you will be at the forefront of innovation—driving micro-architecture and RTL development while spearheading HW/SW... and optimizing Verilog RTL, with expertise in Spyglass for thorough LINT and Clock Domain Crossing (CDC) checks to ensure flawless...
development, RTL coding (Verilog/SystemVerilog), synthesis, STA/timing closure, physical design, and verification methodologies...
and implements corrective measures to resolve failing tests Collaborates with GPU architects, RTL developers, and physical design...
and implements corrective measures to resolve failing tests Collaborates with GPU architects, RTL developers, and physical design...
. Debug simulation failures, analyze waveforms, and work with RTL designers to resolve issues. Create and maintain...
. Debug simulation failures, analyze waveforms, and work with RTL designers to resolve issues. Create and maintain...