and RTL coding, you will contribute to the creation of functional units, GPU IP blocks, and their integration into system...: Develop RTL code and implement optimized logic designs for GPU IPs, ensuring alignment with architecture and microarchitecture...
7+ years or more of RTL experience 1 + years of experience managing a design team Demonstrated ability to lead...
Lugar:
San Diego, CA | 30/04/2026 20:04:34 PM | Salario: S/. $145400 - 215340 per year | Empresa:
Marvell Expect Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated... circuits. Participate in the design development cycle, from RTL coding, specifications of timing, closely work with design...
Lugar:
San Diego, CA | 30/04/2026 19:04:38 PM | Salario: S/. $115200 - 170390 per year | Empresa:
Marvell-architecture and RTL for complex power management integrated circuits. Work closely with system and chip architects to design...-architecture docs, RTL coding, specifications of timing, closely work with design verification teams to review test plans...
Lugar:
San Diego, CA | 30/04/2026 19:04:32 PM | Salario: S/. $160400 - 237320 per year | Empresa:
Marvell-architecture and RTL for complex power management integrated circuits. Work closely with system and chip architects to design...-architecture docs, RTL coding, specifications of timing, closely work with design verification teams to review test plans...
graduated from a four-year university, please apply to be an Associate Engineer. Role: RTL Development for FPGA targeted... converters, memories, MCUs Write software to interface and test RTL in hardware Collaborate closely with electrical...
10+ years or more of RTL experience 3 + years of experience managing a design team Demonstrated ability to lead...
within robust scripted flows. Collaborate with RTL, DV, methodology, and infrastructure teams. Debug complex infrastructure...
Senior Director of Physical Design leads end-to‑end RTL‑to‑GDSII execution for complex, cutting‑edge SoCs while scaling... PD site. Provide senior‑level accountability for RTL‑to‑GDSII execution, including synthesis, floorplanning, power...
. Principal job responsibilities include RTL design, verification, synthesis, timing optimization, static timing verification...-speed digital IC design for 10+ years, including RTL design with System Verilog, timing optimization, verification...