following technical skills: Working knowledge of digital design and signoff. Able to independently complete Netlist RTL-GDS...
of experience. Proven experience in taping out complex SoCs and post silicon debug Strong RTL design skills in SystemVerilog.... Understanding of how front-end RTL decisions impact physical implementation and verification. Familiarity with industry standard...
in taping out one or two complex SoCs Strong RTL design skills in SystemVerilog Hands-on experience with Block design... and Subsystem or SoC integration and debug Understanding of how front-end RTL decisions impact physical implementation...
, including constrained-random testing, functional coverage, and assertions. You will own RTL simulation and debug activities... and adopting relevant DV industry trends. Lead deep RTL and system-level debug efforts, performing complex root-cause analysis...
across Architecture, RTL, Verification, Physical Design disciplines to deliver high-performance, low-power SoCs for use in the cloud... Knowledge in micro-architecture design, RTL coding, and functional verification Proficient using Verilog/VHDL Knowledge...
comprehensive functional verification against design specifications. Perform deep RTL debugging and root-cause analysis... and verification flows, with proficiency in RTL simulation and debugging. Capable of resolving complex technical issues independently...
, or related fields with 5-10 years of experience. Proven experience in taping out complex SoCs and post silicon debug Strong RTL..., and timing constraints. Understanding of how front-end RTL decisions impact physical implementation and verification...
, familiar names to all candidates. What You Can Expect -Develop RTL designs using Verilog/SystemVerilog for digital IP... blocks and subsystems. -Translate architectural specifications into clean, synthesizable RTL -Perform linting, CDC...
, RTL design, design verification, firmware, and software teams to ensure our next-generation AI/ML accelerators meet the... networks, ML HW architecture, and/or CI/CD - Familiarity with the validation lifecycle from RTL simulation (SystemVerilog/UVM...
fabric, and the IO-bridge. The team works across Architecture, RTL, Verification, Physical Design disciplines to deliver high...