Senior Principal Digital IC Design Engineer

communication in AI clusters. What You Can Expect Design, develop, implement, verify, and document micro-architecture and RTL... implementations. Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding...

Lugar: Santa Clara, CA | 28/05/2026 18:05:15 PM | Salario: S/. No Especificado | Empresa: Marvell

Physical Design Engineer for Core IP

of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the... of Static Timing Analysis, Noise analysis, and reliability verification techniques Strong knowledge of RTL to GDS methodologies...

Lugar: Hillsboro, OR | 27/05/2026 21:05:43 PM | Salario: S/. No Especificado | Empresa: Intel

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.... What You Can Expect Own and drive PCIE/CXL subsystem micro-architecture definition, RTL implementation, and integration...

Lugar: Santa Clara, CA | 23/05/2026 02:05:42 AM | Salario: S/. $134390 - 201300 per year | Empresa: Marvell

Director of Silicon Design for MEM/PCIE COE

customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.... What You Can Expect - Define and scales RTL development, drive reuse across IP and programs - Owns delivery of end-to-end PCIE...

Lugar: Santa Clara, CA | 22/05/2026 23:05:26 PM | Salario: S/. No Especificado | Empresa: Marvell

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.... What You Can Expect Own and drive PCIE/CXL subsystem micro-architecture definition, RTL implementation, and integration...

Lugar: Irvine, CA | 22/05/2026 20:05:58 PM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell