and infrastructure in alignment with company-wide technology strategy Lead RTL-to-GDSII implementation for multiple SoC programs... technologies used in major foundries Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure...
principles to support block-level and system-level digital design activities, including RTL development and integration..., computer architecture, or SoC development. Understanding of digital design fundamentals, including RTL design, finite state...
decisions Implement specifications/designs in RTL and coordinate the work of other junior designers to deliver high-quality... other designers to deliver large complex logic blocks Experience using RTL quality tools such as linting and CDC analysis...
of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the... techniques. Knowledge of RTL to GDS methodologies and formal equivalence Experience performing CPU level timing analysis...
of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the... Analysis, Noise analysis, and reliability verification techniques. Strong knowledge of RTL to GDS methodologies and formal...
Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation... and circuit simulation to write RTL and optimize mixed signal logic to qualify the design to meet power, performance, area...
to minimize the effect of parasitics, device stress, and process variation. Collaborate with digital RTL engineers on the...
of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the... techniques. Knowledge of RTL to GDS methodologies and formal equivalence Experience performing CPU level timing analysis...
. Collaborate with Architecture, RTL, DFT, and Analog teams to understand the design requirements, analyze the timing complexities... experience in ASIC timing and STA. Strong understanding of ASIC design flows, from RTL to GDSII. Knowledge and hands...
. Collaborate with Architecture, RTL, DFT, and Analog teams to understand the design requirements, analyze the timing complexities... experience in ASIC timing and STA. Strong understanding of ASIC design flows, from RTL to GDSII. Knowledge and hands...