FPGA / ASIC Design Engineer
peripherals and interrupts Experience deploying designs on FPGA or SDR platforms, from RTL, through simulation, synthesis, lab...
Lugar: Bedford, MA | 03/11/2026 19:11:25 PM | Salario: S/. No Especificado | Empresa: Mitre
Mid-Level Electrical Engineer
development, detailed design, schematic capture, and PCB layout. Experience with FPGA RTL development and simulation is strongly... vias Experience with VHDL for FPGA RTL development Experience with OSVVM and VHDL for FPGA simulation Experience...
Lugar: Raleigh, NC | 03/11/2026 18:11:40 PM | Salario: S/. No Especificado | Empresa: Applied Research Associates
Senior ASIC Design Engineer
closure. Identify and fix timing in RTL to meet the frequency target. Work with the Verification team to make sure...
Lugar: Durham, NC | 03/11/2026 18:11:25 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise
Intern - Digital Design
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional RTL Digital Design Intern... inventors and engineers in the world to develop products that make data faster and safer. As a RTL Digital Design Intern...
Lugar: Johns Creek, GA | 03/11/2026 18:11:06 PM | Salario: S/. No Especificado | Empresa: Rambus
Senior Electrical Engineer
development, detailed design, schematic capture, and PCB layout. Experience with FPGA RTL development and simulation is strongly... vias Experience with VHDL for FPGA RTL development Experience with OSVVM and VHDL for FPGA simulation Experience...
Lugar: Raleigh, NC | 03/11/2026 18:11:10 PM | Salario: S/. No Especificado | Empresa: Applied Research Associates
Front End Design Engineer
About the role Remote contract for digital hardware engineers: turn real RTL work into design, bug-fix and PPA (power...
DV Intern
. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full...
Lugar: San Jose, CA | 03/11/2026 03:11:53 AM | Salario: S/. No Especificado | Empresa: Etched
Senior Modem SOC Design Engineer - TeraWave
Team, you will design digital hardware for the TeraWave satellite communication System on Chip (SOC). You will own RTL... from communication system specifications through microarchitecture, RTL, SOC integration, and timing closure, partnering...
Lugar: Texas | 03/11/2026 03:11:24 AM | Salario: S/. No Especificado | Empresa: BLUE ORIGIN
Principal Modem SOC Design Engineer - Terawave
contributor role carries technical leadership scope. You will lead RTL design for the modem SOC and its subsystems, define.... Responsibilities Lead RTL design in Verilog or System Verilog for the modem SOC and its subsystems Define microarchitecture based...
Lugar: Texas | 03/11/2026 03:11:31 AM | Salario: S/. No Especificado | Empresa: BLUE ORIGIN
Physcial Design Engineer
with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks. Help close...
Lugar: San Jose, CA | 03/11/2026 03:11:16 AM | Salario: S/. No Especificado | Empresa: Arrow Electronics