and datapath logic, including RTL and system-level debug. Experience verifying LDPC, FEC, framing, or beamforming logic using bit...
with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks. Help close...
from synthesis through GDSII sign-off. You will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL... budgets for clean hierarchical integration of your blocks into the top level. Collaborate with RTL Designers and provide...
, support ASIC infrastructure, automate PD flows, improve CAD infrastructure Collaborate with RTL Designers and provide... with PD Tools, flow, and design methodology from RTL synthesis to GDSII sign-off Experience with back-end design...
design comprehension and debugging. - Practical experience with RTL design. Amazon is an equal opportunity employer...
characterization data back to RTL and physical design teams as input for DVFS policy, clock gating coverage, and leakage optimization...
. Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels;root-cause... across both pre-silicon (emulation, FPGA, RTL simulation) and post-silicon (lab bring-up, characterization) environments. Experience...
, CPU subsystems, low-power peripherals, and vendor IP wrappers. You will work closely with architects, RTL designers, DV... with architects and RTL designers to translate design intent and specifications into high-value formal properties and closure criteria...
ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW... bottlenecks. Debug complex datapath and protocol issues in RTL and testbench environments. Work closely with architects...
coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP... RTL-to-GDSII flow, and operates with the urgency and proactivity that a first-silicon program demands. Key...