Senior System Engineer

, logic analyzers, and lab power supplies. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands...

Lugar: Arlington, VA | 15/01/2025 02:01:32 AM | Salario: S/. No Especificado | Empresa: Leidos

SoC Design Verification Engineer - Power

failures to determine the root cause;work with RTL and firmware engineers to resolve design defects and correct test issues.../AI processor knowledge. Proficient in debugging firmware and RTL code using simulation tools. Proficient in developing and using...

Lugar: Boxborough, MA | 15/01/2025 01:01:18 AM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

SoC Chiplet Design Lead

to balance trade-offs in performance, power, cost, and features. Lead efforts in RTL design, design-for-test (DFT) strategies... from concept to high-volume production. Expertise in RTL design using Verilog or SystemVerilog. In-depth knowledge of SoC...

Lugar: Boston, MA | 15/01/2025 00:01:43 AM | Salario: S/. No Especificado | Empresa: SkillTorch

ASIC Timing Engineer, Staff

signal), timing constraints and provide solutions if required. Good understanding of RTL to GDS digital flow. Knowledge of DC...

Lugar: San Diego, CA | 14/01/2025 23:01:51 PM | Salario: S/. No Especificado | Empresa: Qualcomm

SoC Chiplet Design Lead

to balance trade-offs in performance, power, cost, and features. Lead efforts in RTL design, design-for-test (DFT) strategies... from concept to high-volume production. Expertise in RTL design using Verilog or SystemVerilog. In-depth knowledge of SoC...

Lugar: Austin, TX | 14/01/2025 21:01:16 PM | Salario: S/. No Especificado | Empresa: SkillTorch

SoC Chiplet Design Lead

to balance trade-offs in performance, power, cost, and features. Lead efforts in RTL design, design-for-test (DFT) strategies... from concept to high-volume production. Expertise in RTL design using Verilog or SystemVerilog. In-depth knowledge of SoC...

Lugar: Santa Clara, CA | 14/01/2025 19:01:54 PM | Salario: S/. No Especificado | Empresa: SkillTorch

Senior Physical Design Engineer

augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Lugar: San Jose, CA | 14/01/2025 19:01:03 PM | Salario: S/. No Especificado | Empresa: Prodapt
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