Principal Design-for-Test (DFT) Engineer
, and other on-chip test features. Collaborate with RTL, verification, and physical design teams to ensure successful DFT integration...
, and other on-chip test features. Collaborate with RTL, verification, and physical design teams to ensure successful DFT integration...
into the U.S. as a refugee or granted asylum. Key job responsibilities Work with RTL/logic designers to drive architectural... through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. Teams BASIC...
-chip level from RTL to GDSII. You will collaborate with the Foundry Process Engineer, SoC Architect, Microarchitecture...-end design team to address timing, congestion and power issues. In-Depth Knowledge of design flow from RTL to GDSII...
of CPU designs from RTL to GDSII. You will gain hands-on experience with industry-standard EDA tools and develop expertise... physical design and verification flows for custom CPU designs, ranging from RTL synthesis to GDS generation, custom and memory...
, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler, Genus, or LEC. Experience...
, front-end/RTL/logic designers. Manage and scale the design team to develop reusable IP supporting a multi products roadmap... requirements. Work closely with physical-design and DFX teams to deliver complete RTL-to-GDSII designs. Co-own post-silicon...
. Responsibilities will include but are not limited to: Develop logic designs and register transfer level (RTL) coding for graphics IPs... verification to ensure design integrity and correctness of features. Debug failing RTL tests to implement corrective measures...
, hardware engineers, and firmware engineers to understand the new features to be developed RTL Development: Design, verify... hardware fabric PREFERRED EXPERIENCE: Hands-on experience with FPGAs RTL Expertise: Expert in SystemVerilog/Verilog...
. Completes monthly Store Visit Form for review with RTL and optical team. Ensures all operating policies and procedures...
architectures. Familiarity with RTL verification methodologies using SystemVerilog and exposure to UVM-based verification...