Senior Principal Digital IC Design Engineer
Develop and optimize RTL for performance, power, and area, ensuring compliance with security standards and protocols...
Develop and optimize RTL for performance, power, and area, ensuring compliance with security standards and protocols...
Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated circuits... development cycle, end-to-end, from writing micro-architecture docs, RTL coding, specifications of timing, closely work...
partition floorplans with macro/pin placements and keep-outs. Work with RTL designers to define timing constraints;run...
for architecture, micro‑architecture, RTL, DV, PHY integration, and system validation decisions. Define and maintain reference... across multiple programs and sites. Guide cross‑functional teams (architecture, RTL, DV, PHY, FW/SW, validation) to deliver reusable...
and resolution of hardware, software, and model issues. Develop HW/SW enablement flows and tools to accelerate RTL validation...
and flow development in an ASIC rtl-to-gds environment Strong proficiency in TCL and python scripting for CAD flow... routing for silicon & fanout, SI/PI analysis Experience with power analysis topics RTL power estimation & optimization...
their mission-critical infrastructure. What You Can Expect Define and drive micro-architecture and RTL implementation..., correlating RTL simulations with lab measurements, and working with validation teams to resolve production issues Contribute...
failures using systematic root-cause analysis techniques, correlating RTL behavior with specifications, and partnering... that enhance productivity across global verification teams Support multiple verification platforms including RTL simulation...
: Define and develop ASIC RTL design and verification at both chip level and block level. Collaborate with cross-functional... teams to design, implement, and verify PCIe interfaces. Perform RTL coding, synthesis, and simulation to ensure design...
mitigation, and design optimization. Drive cross‑functional collaboration with architecture, RTL, PHY, SI/PI, firmware, system...